11. Exception Entry and Exit
1. Exception Entry Sequence
When an exception occurs in the system, whether it's a system exception or an interrupt, the processor switches from its current task to service the exception. The general process is outlined below:
1.1 Pending Bit Set
For interrupts, the "Pending" bit for the specific exception is set in the NVIC (Nested Vector Interrupt Controller). For system exceptions, this bit is set in a dedicated system control register within the System Control Space (SCS). This happens automatically when the corresponding event occurs.
1.2 Load EXC_RETURN Value into LR
Before starting the stacking operation, the processor loads a special value called EXC_RETURN into the Link Register (LR). This value will be crucial for controlling the behavior of exception exit later on.
Refer to the ARM Cortex-M4 Generic User Guide, Section 2.3.7 "Exception entry and return", you can find the following table:
As you can see there are 6 possible values for EXC_RETURN. It determines what mode to return to, which stack pointer to use to pop the state variables, and which stack pointer to use for the return address.
1.3 Stacking and Vector Fetch
Regardless of the type of exception, the processor pushes certain state variables onto the current stack to save the context. This usually includes registers and flags that need to be restored later. Concurrently, the processor fetches the address of the exception handler from the vector table.
1.4 Entry into the Handler and Active Bit Set
The processor then jumps to the exception handler code. For interrupts, the corresponding "Active" bit is set in the NVIC. For system exceptions, the "Active" bit would be set in the corresponding system control register.
1.5 Clear the Pending Status
The processor usually clears the "Pending" bit automatically. However, for some interrupts and system exceptions, this might need to be done manually within the handler code.
1.6 Processor Mode Changed to Handler Mode
Regardless of the type of exception, as the processor begins executing the handler, it switches to "Handler" mode. This mode allows the processor to access privileged instructions and resources.
1.7 Handler Core is Executing
The handler code carries out the tasks necessary to service the exception. This could involve a variety of operations depending on the nature of the exception.
While the handler code is running, any stack operations use the Main Stack Pointer (MSP), irrespective of whether the processor was using the Process Stack Pointer (PSP) before the exception occurred.
2. Exception Exit Sequence
2.1 Evaluate EXC_RETURN Value
Before exiting the handler, the processor evaluates a special value known as EXC_RETURN. This value determines various exit behaviors, such as which stack pointer to use upon exit and whether to switch back to Thread mode or a privileged mode.
2.2 Clear Active Bit
The "Active" bit associated with the exception being serviced is cleared. For interrupts, this is in the NVIC, and for system exceptions, it's in the corresponding system control register.
2.3 Restore Context and Registers
The processor then pops the saved state variables from the stack. This restores the context, such as registers and flags, back to their states before the exception occurred.
2.4 Switch Back to Original Mode
Upon restoring the context, the processor switches back to its previous operational mode, which could either be "Thread" mode or another "Handler" mode, based on the EXC_RETURN value.
2.5 Retrieve Return Address
The processor fetches the return address from the stack to identify where to continue the interrupted code execution.
2.6 Clear any Software-Triggered Flags (if applicable)
If the exception was software-triggered, any manually set flags that contributed to triggering or managing the exception should be cleared.
2.7 Jump Back to Original Task
Finally, using the retrieved return address, the processor jumps back to continue executing the code from where it was interrupted. The stack pointers revert to their original configuration, in accordance with the EXC_RETURN value.
2.8 Execution Resumes
At this point, the processor resumes its normal execution. If other pending exceptions meet the criteria for triggering, the Exception Entry and Exit process may be initiated again.