7. GPIO (General-Purpose Input/Output) Structure and Registers

1. Overview

A GPIO port in an embedded system like the STM32F4xx series usually has a set of registers to control its behavior. These registers include:

  • Port Direction (Mode) Register (GPIOx_MODER): This register controls the direction of data flow. It specifies whether a pin will function as an input or an output. You can configure each pin separately.

  • Port Speed Register (GPIOx_OSPEEDR): This register determines the speed of data transmission for the output pins. The options are generally low, medium, fast, and high speed. The exact speeds depend on the chip specifications.

  • Port Output Type (Push-pull or Open-drain) Register (GPIOx_OTYPER): This register defines how the output signal is driven. Push-pull provides a stronger output drive but may consume more power. Open-drain provides flexibility in connecting multiple outputs together but requires an external pull-up or pull-down resistor.

  • Port Output Data Register (GPIOx_ODR): This register holds the data you want to output to the external world. If a pin is set as output, writing a '1' or '0' to the corresponding bit in this register sets or clears that output pin, respectively.

  • Port Input Data Register (GPIOx_IDR): This register holds the data read from the external world. When a pin is configured as an input, reading this register will return the current state ('1' or '0') of that input pin.

  • Port Pull-up/Pull-down Register (GPIOx_PUPDR): This register configures the internal pull-up or pull-down resistors for each pin. These resistors can help set a default state for a pin when it is not actively being driven high or low.

  • Other Configuration Registers: These registers cover additional settings and configurations. These might include alternate function settings for pins, interrupt configuration, and lock registers to prevent accidental reconfiguration. Check out "Section 7. General-purpose I/Os (GPIO)" of RM0390 for more details on the STM32F4xx GPIO registers.

2. GPIO Port Mode Register (GPIOx_MODER)

The GPIO Port Mode Register (GPIOx_MODER) is a crucial register for configuring the modes of individual pins on a specific GPIO port.

Different Ports Have Different Reset Values

Each port may have a different reset value. Consult the chip's datasheet to know the exact reset values for each port. The reset value primarily depends on the port's intended usage and features.

GPIO Ports Are by Default in Input Mode

To save power and avoid undefined behavior, the GPIO ports are generally set to input mode upon reset. In this state, the port's pins are at high impedance, which minimizes power consumption.

Each Pin Can Be Configured Individually Using 2 Bits

Each GPIO pin is associated with 2 bits in the GPIOx_MODER register. These bits define the mode of the pin. For example, '00' could represent Input mode, '01' General-purpose output, '10' Alternate function, and '11' Analog mode.

Modes

GPIOx_MODER

Input Mode

The default mode, characterized by high impedance. Useful for reading external signals without affecting them. Input pins should also be also to issue interrupts.

General-Purpose Output Mode

This mode allows the pin to output either a high or low signal. Commonly used for driving LEDs, relays, or interfacing with other digital components.

Alternate Function Mode

In this mode, the pin is configured for specialized functions like PWM output, I2C, SPI, etc. These functions bypass the typical GPIO pathways to enable hardware-level features of the chip.

Analog Mode

Used when the pin is to function as an analog input or output. Typically, this is used for ADC (Analog to Digital Conversion) or DAC (Digital to Analog Conversion) functionalities.

3. What Happens When a GPIO Pin is Set to Input Mode?

GPIO_structure

In the reference manual, you can find the diagram above. When the GPIO pin is set to input mode, the output driver (lower part of the diagram) will be disabled, behaving like an open circuit. The input driver (upper part of the diagram), which consists of a TTL Schmitt trigger, will be enabled.

A TTL Schmitt trigger is a type of input buffer that ensures clean and stable digital signals. It uses hysteresis to prevent noise from causing false transitions. When the input signal crosses a certain threshold, the Schmitt trigger changes its output state. This mechanism makes it particularly useful in environments with high electrical noise.

The input signal is then sent to the input data register. This register is connected to the input pull-up/pull-down resistors. These resistors can be enabled or disabled by the pull-up/pull-down register. As shown in the table below, the pull-up/pull-down register is typically 40 kOhm, with some exceptions where the value is 10 kOhm for PA10 and PB12. This variation is due to the specific electrical characteristics and design requirements of these pins, such as their ability to handle different current levels or to provide different voltage levels for interfacing with various peripherals.

input_pull_resistors

These registers are referred to as "Weak Pull-up/Pull-down" because they provide a minimal amount of current to the pin. This is sufficient to establish a clear logic level when no active driver is connected, but it's weak enough to not interfere significantly with the operation of external devices connected to the pin.

4. What Happens When a GPIO Pin is Set to Output Mode?

There are two output configuration modes for GPIO pins: open-drain and push-pull. The output mode of a pin is configured using the GPIOx_OTYPER register. For more details, refer to the previous section.

GPIOx_OTYPER

In push-pull mode, the pin can actively drive the output to either a high or low state. This is achieved by 'pushing' the output high by connecting it to the supply voltage, or 'pulling' it low by connecting it to ground. This mode is commonly used when a definite high or low signal is required.

On the other hand, in open-drain mode, the pin can either be 'open' (disconnected) or 'drained' (connected to ground). In this configuration, the pin can pull the line to a low state, but it cannot drive it high. To achieve a high state, an external pull-up resistor is needed. Open-drain outputs are typically used in bus configurations like I²C, where multiple devices might need to drive the same line.

Unlike in the input mode, where the input driver is enabled and the output driver is disabled, in the output mode, both the input and output drivers are enabled. This means that the pin can both drive and read the output signal. This is useful for applications like LED blinking, where the pin needs to read the current state of the LED to determine whether to turn it on or off.

5. Alternate Function Mode

In STM32 microcontrollers, Alternate Function (AF) mode is a powerful feature that allows GPIO pins to serve specific roles beyond simple digital input or output. This is crucial for using the microcontroller’s advanced peripherals like UART, SPI, I2C, and PWM.

Each GPIO pin on an STM32 microcontroller can be multiplexed to perform various functions. The AF mode is used to enable these alternate functions, which are usually connections to internal peripherals. For instance, if you need to use a pin for UART communication, you would set that pin to the appropriate alternate function.

To configure a pin for alternate function, you need the following registers:

  • GPIOx_MODER Register: First, the GPIO pin is set to alternate function mode using the GPIOx_MODER register.
  • GPIOx_AFRL and GPIOx_AFRH Registers: After setting the pin to AF mode, you specify which alternate function to use. STM32 microcontrollers use two registers for this purpose: GPIOx_AFRL (Alternate Function Low Register) for pins 0 to 7 and GPIOx_AFRH (Alternate Function High Register) for pins 8 to 15. These registers determine which of the available alternate functions is assigned to each GPIO pin.

The specific alternate functions available depend on the microcontroller series and each individual pin. A pin might be able to serve as a UART transmit (TX), UART receive (RX), I2C SDA, I2C SCL, SPI MOSI, SPI MISO, SPI SCK, and so on. The STM32 datasheet and reference manual provide detailed mapping tables showing which alternate functions are available for each pin.

Alternate functions are used for the following reasons:

  • Serial Communication: For UART, USART, I2C, SPI communications.
  • Timing and Control: For timers, PWM generation, and capture/compare functions.
  • Advanced Peripherals: Connecting to CAN, USB, and Ethernet peripherals.

For more details, refer to the Alternate Function table in the datasheet.

AF_table

This table only shows the alternate function for port A. The alternate functions for ports B to H are shown in the datasheet.

6. GPIO Output Speed Register (GPIOx_OSPEEDR)

The GPIOx_OSPEEDR register is important when a pin is set to output mode. It controls the rate at which a GPIO pin can switch between low and high states, effectively determining the speed of data transmission for the output pins. The configuration options typically include low, medium, fast, and high speed. The exact definitions of these speeds vary depending on the specific STM32 microcontroller in use.

GPIOx_OSPEEDR

The concept underlying the output speed settings is related to the slew rate. The slew rate refers to how quickly the output voltage level can change. A faster slew rate means the pin can switch states more quickly, which is crucial for high-speed digital communication. However, a faster slew rate can also lead to increased electromagnetic interference (EMI) and can be more demanding on power consumption.

The default speed setting for a GPIO pin is usually low, which is often sufficient for common tasks. A low speed reduces EMI and power consumption and is suitable for most general-purpose I/O tasks.

When higher data transmission speeds are required, such as in high-frequency communication interfaces or when driving capacitive loads, the speed can be increased to medium, fast, or high. However, it's essential to consult the "I/O AC characteristics" table in the STM32 datasheet to ensure that the maximum permissible switching frequency for the pin is not exceeded. This table provides detailed information about the allowed operating conditions for the I/O pins, including speed ratings and corresponding frequency limits.

OSPEEDR_table

Changing the GPIO output speed can be critical in applications where timing and response speed are crucial. However, it's important to balance the need for speed with considerations of power consumption and EMI, especially in sensitive applications or environments.

7. GPIO Pull-up/Pull-down Register (GPIOx_PUPDR)

This part should be self-explanatory. The GPIOx_PUPDR register configures the internal pull-up or pull-down resistors for each pin. These resistors can help set a default state for a pin when it is not actively being driven high or low.

GPIOx_PUPDR

8. GPIO Input Data Register (GPIOx_IDR)

The GPIOx_IDR register holds the data read from the external world. You can only read from this register. They are updated for every AHB1 clock cycle.

GPIOx_IDR

9. GPIO Output Data Register (GPIOx_ODR)

The GPIOx_ODR register holds the data you want to output to the external world. You can read and write to this register.

GPIOx_ODR